Job Description
- Key abilities required for the activity are:
- VLSI HVL Verification-L3 (Mandatory)
- VLSI-VERIFICATION PLANNING-L3
- SOC conventions - AXI and PCIe-L3
- Least work experience:5 - 8 Years
- Applicant ought to have solid convention information on PCIE Gen 2/3/4/5
- Should have hands-on understanding on experiment coding, confirmation arranging and troubleshoots.
- Should be autonomous and ready to lead a group of 3 - 5 individuals.
Company Profile:
Salary: Not disclosed
Industry: IT / Software
Functional Area: Embedded / Chip Design
Role Category:
Employment Type: Full time
Keyskills
